A first conventional computer system may include a processor coupled to a double data rate (DDR) memory (e.g., SDRAM) via a memory interface, such as a DDR link. DDR memory is cheaper than other memory, such as an extreme data rate (XDR) memory, and/or has a higher storage capacity than such other memory. More specifically, XDR memory is limited in the amount of memory capacity it may support and is more expensive than DDR 2 or DDR 3 memory. Further, DDR memory may include a plurality of ranks, and therefore, the first conventional computer system may support a DDR command and associated address from the processor that indicates a rank of the memory which includes the address. By including rank information in a DDR command, the DDR command may address at least twice as many addresses as a similar command that does not include rank information. However, the DDR link may be slower than other links (e.g., an extreme input/output (XIO) link). A width of the DDR link may be increased (e.g., to 288 bits) to increase the bandwidth thereof. Therefore, the DDR link may consume a large number of processor pins to couple to the processor. By requiring the processor to include a large number of pins, the DDR link may cause an increase in size of the processor and cost associated therewith.
A second conventional computer system may include a processor coupled to an XDR memory via a memory interface, such as an XIO link. As described above, XDR memory is more expensive and has less storage capacity than DDR memory. Further, the XDR memory may not be divided into ranks, and therefore, the second conventional computer system cannot support an XDR memory command and associated address that indicates a rank of memory including the address. However, the XIO link may be a fast, narrow link (e.g., 72 bits wide). Therefore, the XIO link may consume fewer pins on a processor to couple thereto than the DDR link. Consequently, the XIO link may enable a size of the processor and cost associated therewith to be reduced.
As described above, the DDR link coupled to the processor of the first conventional computer system may cause an increase in the size of the processor and cost associated therewith. Further, the XDR memory included in the second conventional computer system may be more expensive than other memory, may have less storage capacity than such other memory and cannot include a plurality of ranks. Accordingly, improved methods, apparatus and systems for interfacing a memory and a processor are desired.